notifications
category
Computer Science

Computer Science Topics

Postgraduate level — Computer Science

topic
6
Topics
quiz
220
Question bank
star
440
Total marks
description
0
Materials

Choose question count and time — session stays in your browser only.

filter_alt Topics

lock

Basic Computers

Locked · 170 questions

lock

Algorithms

Locked · 50 questions

lock

Data Structures

Locked · 50 questions

lock

Operating Systems

Locked · 50 questions

lock

DBMS

Locked · 50 questions

lock

Computer Networks

Locked · 50 questions

quiz Questions

help

Q51

Which component of the Central Processing Unit (CPU) is fundamentally responsible for performing arithmetic operations and logical comparisons?

1 · 2 marks · MCQ

A.

Control Unit (CU)

B.

Arithmetic Logic Unit (ALU)

C.

Registers block

D.

Cache memory space

Explanation

The Arithmetic Logic Unit (ALU) is the digital circuit within the CPU that executes all mathematical operations (like addition and subtraction) and logical decisions (like AND/OR comparisons).

help

Q52

Which type of computer memory layout acts as high-speed non-volatile storage natively holding the basic firmware instructions needed to bootstrap the system?

1 · 2 marks · MCQ

A.

Random Access Memory (RAM)

B.

Read-Only Memory (ROM)

C.

SRAM Cache channels

D.

Virtual Memory buffers

Explanation

Read-Only Memory (ROM) is non-volatile storage that retains its configurations even when the device loses power. It characteristically stores critical software like the BIOS or firmware required to start basic computer operations.

help

Q53

What is the primary distinctive structural identifier of Von Neumann architecture configurations compared to alternate basic computing loops?

1 · 2 marks · MCQ

A.

Shared memory layout structure tracking both system data and instructions cleanly

B.

Absolute physical separation of data and instruction path pipelines

C.

Complete absence of binary-coded logical operation matrix blocks

D.

Exclusive utilization of multi-threaded vacuum tube frameworks natively

Explanation

Von Neumann architecture uniquely shares a single physical memory and hardware bus path to handle both system code instructions and user data storage arrays, causing a throughput limit known as the 'Von Neumann bottleneck'.

help

Q54

Which of the following acts as the baseline system operating software component designed natively to arbitrate resource allocation between application codes and physical computer hardware?

1 · 2 marks · MCQ

A.

Compiler utility parser

B.

Operating System (OS)

C.

Linker script assembly

D.

Database Engine wrapper

Explanation

The Operating System (OS) is core baseline software managing computer processing loops, directory indices, storage matrices, and input/output peripherals directly balancing hardware tasks.

help

Q55

Which computing generation is historically categorized by the systemic deployment of integrated circuits (ICs) replacing individual transistor setups on computer motherboards?

1 · 2 marks · MCQ

A.

First Generation computing loop

B.

Second Generation grid

C.

Third Generation layout phase

D.

Fourth Generation micro system

Explanation

The Third Generation of basic computers (roughly tracking the late 1960s to early 1970s phase) is defined archaeologically in technology by integrated circuits replacing discrete transistor grids, yielding a massive boost in computation processing outputs.

help

Q56

In basic computer systems, which type of specialized internal processor register natively holds the memory address of the next software instruction slated to be fetched and executed?

1 · 2 marks · MCQ

A.

Accumulator Register

B.

Program Counter (PC)

C.

Instruction Register (IR)

D.

Memory Data Register (MDR)

Explanation

The Program Counter (PC), also known as the instruction pointer in some computer architecture models, keeps track of the system's position in the execution loop by automatically incrementing to store the memory address of the next sequential instruction.

help

Q57

Which structural computer layout attribute represents the primary operational difference separating the Harvard Architecture model from the standard Von Neumann model?

1 · 2 marks · MCQ

A.

Physically separated storage pathways and buses for handling instructions and user data independently

B.

The absolute elimination of multi-bit arithmetic logical execution chips

C.

Exclusive implementation of serial mechanical processing relays natively

D.

Unified storage mapping where instructions and data arrays crowd the same system bus channel

Explanation

Harvard Architecture uses physically separated storage pathways and hardware buses for program code instructions and user data variables, allowing the processor to fetch instructions and access data simultaneously without encountering bus sharing blockages.

help

Q58

What baseline technological component serves as the definitive structural classification marker identifying First Generation computing hardware setups natively?

1 · 2 marks · MCQ

A.

Discrete Transistor logic assemblies

B.

Vacuum Tubes

C.

Integrated Silicon Circuits (ICs)

D.

Microprocessors with VLSI tracking matrices

Explanation

First Generation computing systems (spanning roughly from the 1940s to the mid-1950s phase, like ENIAC and UNIVAC) natively implemented vacuum tubes for circuitry loops and magnetic drums for early memory storage layouts.

help

Q59

Which distinctive attribute defines the volatile nature of standard system Random Access Memory (RAM) layouts when power metrics fluctuate?

1 · 2 marks · MCQ

A.

Permanent data retention even without structural power lines active

B.

Immediate loss of stored digital states upon electrical power disconnection

C.

Systematic mechanical shifting of sectors across optical array tracks

D.

Total reliance on localized ultraviolet erasure routines natively

Explanation

Volatile memory systems like RAM lose all stored digital instruction states and data arrays immediately whenelectrical power supply is disconnected or turned off.

help

Q60

How many distinct binary data bit tracks natively bundle together to compute exactly one standard byte parameter in basic hardware memory tracking frameworks?

1 · 2 marks · MCQ

A.

4 bits

B.

8 bits

C.

16 bits

D.

32 bits

Explanation

In computing logic and digital architecture baselines, a standard byte consists precisely of 8 bits. A bit represents the absolute elementary binary digital state (either 0 or 1).